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| | {anchor:top} {note} |
| | *Copyright notice :* The copyright of each paper belongs to the respective publisher. Soft copy is provided for personal research and reference only. However, permission for promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the respective copyright owner.{note} |
| | \\ |
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| | ---- |
| | [Video Animations Page|http://www.csi.fau.edu/display/pub/Video+Animations] |
| | [Technical Reports|#techReports] |
| | [Conference Papers 2009|#conferencePapers09] |
| | [Student Reports|#studentReports] |
| | [Tutorials|#tutorials] |
| | [Papers 2008|#papers08] |
| | [Papers 2007|#papers07] |
| | [Papers 2006|#papers06] |
| | [Papers 2005|#papers05] |
| | [Papers 2004|#papers04] |
| | [Older Publications|#oldPubs] |
| | |
| | ---- |
| | {anchor:techReports} |
| | *Technical Reports* |
| | * Shankar, R. [*Biologically Inspired Architectures: An Exploration*|^BIOLOGICALLY INSPIRED ARCHITECTURES_SHANKAR.pdf], CSI Technical Report, TR 2-2009. |
| | |
| | * Norona, C., Shankar, R., *[*University Class Scheduling Development Report*|^Norona_ProgressReport_01_ClassScheduling_05022009B.pdf]**,* CSI Technical Report, TR 1-2009. |
| | |
| | * Shankar, R., Webster, J.G., *[*Object-Process Modeling of Glucose Metabolism in Health and Disease*|^OPD_Glucose_Jan01212009a.pdf]*, CSI Technical Report, TR 3-2008. |
| | |
| | * Shankar, R., Shao, S.Y., Webster, J.G., *[*A Fully Automated Multi-Channel Digital Electrical Impedance Plethysmograph*|^Fully_Automated_Multi_Channel_Plethysmograph.pdf]*, Paper Draft, CSI Technical Reports, TR 2-2008. |
| | |
| | * Shankar, R., Gopinathan, M., Webster, J.G., *[*Digital Signal Processing in Clinical Validation Studies With Impedance Plethysmography*|^Digital_Signal_Processing_Impedance_Plethysmography.pdf]*, Paper Draft, CSI Technical Reports, TR 1-2008. |
| | |
| | * Freytag, G., Shankar, R., Tezak, T., *[*CIM: Component Isolation and Monitoring for System-Level Verification*|^CIM_Component_Isolation_Monitoring.pdf]*, CSI Technical Reports, TR 8-2006. |
| | |
| | * Ansley, J., *[*Semantic Web in Improved Design Interpretation and Communication Integrity*|^Semantic_Web_in_Improved_Design.pdf]*, CSI Technical Reports, TR 7-2006. |
| | |
| | * Agarwal, A., Iskander, C., Kovalski, F., Shankar, R., *[*A Concurrent Architectural Model for Communication Sub-System*|^A_Concurrent_Architectural_Model.pdf]*, CSI Technical Reports, TR 6-2006. |
| | |
| | * Agarwal, A., Shankar, R., *[*Cost Feasibility Analysis for Embedded System Development and the Impact of Various Methodologies on Product Development Cycle*|^Cost_Feasibilty_Analysis.pdf]*, CSI Technical Reports, TR 5-2006. |
| | |
| | * Wanio, A., Watts, A., *[*FPGA Implementation of Triple DES*|^FPGA_Implementation.pdf]*, CSI Technical Reports, TR 4-2006. |
| | |
| | * Cardei, I., *[*Top-Down Software Decomposition - An Approach for Component-based Design Automation*|^Top_Down_Software_Decomposition.pdf]*, CSI Technical Reports, TR 3-2006. |
| | |
| | * Huang, S., [*Support of Design Reuse by Software Product Lines: Leveraging Commonality and Managing Variability*|^Support_of_Design_Reuse.pdf], CSI Technical Reports, TR 2-2006. |
| | |
| | * Cruz, C., *[*Motorola OPP Component Modeling Estimation of Power Consumption as a System Cost on Embedded Devices*|^Motorola_OPP_Component Modeling.pdf]*, CSI Technical Reports, TR 1-2006. |
| | |
| | * Kalva, H., Krieghoff, C., Perret, J., Shankar, R., *[*High Level Metrics for Power Dissipation and Signal Interference: An Integrated Methodology*|^High_Level_Metrics.pdf]*, CSI Technical Reports, TR 3-2005. |
| | |
| | * Krieghoff, C., Shankar, R., *[*SystemC For System Design: Our Academic Experience*|^SystemC_For_System_Design.pdf]*, CSI Technical Reports, TR 2-2005. |
| | |
| | * Freytag, G., Shankar, R., *[*A C+\+ Class Structure for System-Level Assertion-Based Verification*|^A_C_Class_Structured_for_System_Level.pdf]*, CSI Technical Reports, TR 1-2005. |
| | |
| | * Shankar, R., *[*Next Generation Embedded System Design: Issues, Challenges, and Solutions*|^Next_Generation_Embedded_System_Design.pdf]*, CSI Technical Reports, TR 1-2004. |
| | |
| | * Shankar, R., Masory, O., Krishnalyer, R., Gilmore, H., Mucciacciaro, D., Devenney, S., Ueltzen, R., *[*K-12 Hands-on Science Education: A Small Business Proposal*|^K_12_Hands_on_Science_Education.pdf]*, CSI Technical Reports, TR 5-2000. |
| | |
| | * Shankar, R.,*[*Comparative Financial Analysis Report: The Engineering Software Industry and Its Evolving Business Models*|^Comparative_Financial_Analysis.pdf]*, CSI Technical Reports, TR 4-2000. |
| | |
| | * Shankar, R., *[*Medical Instrumentation Industry: With Emphasis on Medtronic*|^Medical_Instrumentation_Industry.pdf]*, CSI Technical Reports, TR 3-2000. |
| | |
| | * Shankar, R., *[*Genomics and Engineering*|^Genomics_and_Engineering.pdf]*, CSI Technical Reports, TR 2-2000. |
| | |
| | * Shankar, R., *[*Academic Innovation - Pitfalls and Strategies*|dc:Innovation^Academic Innovation.pdf]*, CSI Technical Reports, TR 1-2000. |
| | |
| | * Shankar, R., *[*Financial Investment: A Comparison of Five Popular Strategies*|^Comparison_of_Five_Popular_Strategies.pdf]*, CSI Technical Reports, TR 1-1999. |
| | |
| | * Barrett, Jr., R., Shankar, R., Zhong, Z., [*Characterized Analog Cell Library For Artificial Neural Networks*|^Characterized_Analog_Cell_Library.pdf], CSI Technical Reports, TR 1-1994. |
| | |
| | * Pandya, A., Pesulima, E., Shankar, R., [*A Digitally Implementable Sigmoidal Transfer Function For Artificial Neural Networks*|^Digitally_Implementable_Sigmoidal_Networks.pdf], CSI Technical Reports, TR 3-1991. |
| | |
| | * Bidari, R., Shankar, R., [*Efficient Mapping of a Handwritten Digit Recognition System Onto Intel's ETANN Chips*|^Efficient_Mapping_Handwritten_Digit_Recognition.pdf], CSI Technical Reports, TR 2-1991. |
| | |
| | * Pandya, A., Pesulima, E., Shankar, R., [*Hardware Implementation of Learning Neural Networks*|^Hardware_Implementation_Neural_Networks.pdf], CSI Technical Reports, TR 1-1991. |
| | |
| | * Brown, H., Hadjilogiou, J., Landis, D., Sanders, T., Shahsavari, M., Shankar, R., [*A Rapid Prototype Wafer Scale System Design for Signal and Data Processing*|^A_Rapid_Prototype_Wafer_Scale_System.pdf], CSI Technical Reports, TR 1-1989. |
| | |
| | * Bond. M, Gardin, J., Shankar, R., Wilmoth, S., [*Correlation on Noninvasive Compliance Data with Morphologic Data in a Controlled Study of Cholesterol Fed Monkeys*|^Correlation_of_Noninvasive_Compliance_Data.pdf], CSI Technical Reports, TR 1-1988. |
| | |
| | |
| | {anchor:conferencePapers09} |
| | *Conference Reports 2009* |
| |  | * Shankar, R. [*Preparing System Engineers of Tomorrow*|^ASEEPaperSystemsEngineers_Shankar_Improved_012609.pdf], ASEE Southeastern Section Annual Conference, Marietta, GA, Paper Accepted, April 5-7, 2009. |
| | |
| | * Shankar, R. and Agarwal, A. [*KISMET: An Open Source Process for Faculty Participation in ABET Accreditation*|^ASEEPaper_KISMET_Shankar_Improved_020109.pdf], ASEE Southeastern Section Annual Conference, Marietta, GA, Paper Accepted, April 5-7, 2009. |
| | |
 | | * Shankar, R. and Islam, S. [*A Reference Model Based Patient Management System: Opportunities and Challenges*|^REFERENCE MODEL BASED PT MGMT SYSTEM_SHANKAR.pdf], 25th Southern Biomedical Engineering Conference 2009, Miami, FL, Abstract accepted, May 15-17, 2009. |
| | | * Shankar, R. and Islam, S. [*A Reference Model Based Patient Management System: Opportunities and Challenges*|^00240247.pdf], 25th Southern Biomedical Engineering Conference 2009, Miami, FL, Abstract accepted, May 15-17, 2009. [*Powerpoint Version.*|^SBEC09_final2.ppt] |
| | |
| | * Shankar, R. and Mazoleny, C. [*The Health Advisor: Application for Parkinson's Disease*|^THE HEALTH ADVISOR_ShankarVersion_12909.pdf], 25th Southern Biomedical Engineering Conference 2009, Miami, FL, Abstract Accepted, May 15-17, 2009. |
| | | * Shankar, R. and Mazoleny, C. [*The Health Advisor: Application for Parkinson's Disease*|^THE HEALTH ADVISOR_ShankarVersion_12909.pdf], 25th Southern Biomedical Engineering Conference 2009, Miami, FL, Abstract Accepted, May 15-17, 2009. [*Powerpoint Version.*|^The_Health_Advisor_Project.ppt] |
| | |
| | * Shankar, R. [*Preparing System Engineers of Tomorrow*|^ASEEPaperSystemsEngineers_Shankar_Improved_012609.pdf], ASEE Southeastern Section Annual Conference, Marietta, GA, Paper Accepted, April 5-7, 2009. |
| | |
| | {anchor:studentReports} |
| | *Student Reports* |
| | * Brown, A., and Baptiste, L., [*Top-Down Design with UML: File Tracking System*|^File_Tracking_System.pdf], Student Report-5, from CEN 4214 - Software-Hardware Codesign, offered in Fall '08. |
| | |
| | * Conteras, M., and Rivera, B., [*Top-Down Design with UML: Handheld Tour Device*|^Contreras-Rivera_TermProject3_042809.pdf], SR 1-2009, from CEN 4214 - Software-Hardware Codesign, offered in Spring '09. |
| | |
| | * Davis, R., and Su Ham, K., \[*Top-Down Design with UML: High School Volunteer \*\|\^ |
| | Davis_SuHam_TermProject_3_043009.pdf\], SR 6-2009, from CEN 4214 - Software-Hardware Codesign, offered in Spring '09. |
| | |
| | * Di Luca, A., [*Top-Down Design with UML: Epilepsy Monitoring System*|^diluca_termProject3_04-29-09.pdf], SR 2-2009, from CEN 4214 - Software-Hardware Codesign, offered in Spring '09. |
| | |
| | * Fonoage, M., *[*GAIA for Multi-Agent Systems: GreenFire - Intelligent Heating*|^Green_Fire_Intelligent_Heating.pdf]*, Student Report-7, from Dr. Shankar's course, COT 6930 - Biologically Inspired Architecture, offered in Fall '08. |
| | |
| | * Fonoage, Mihai and Fonoage, Mirela, [*Google's Android - An Overview*|^Google'sAndroid_MihaiFonoage.pdf], Student Report-9, from Dr. Shankar's Directed Independed Study offered in Fall '08. |
| | |
| | * Mainville, T., [*Thoughts on Creating Better MMORPGs: Trends in Technology*|^Mainville_Paper1_Trends.pdf], Student Report-10, from Dr. Shankar's course, COT 6930 - Biologically Inspired Architecture, offered in Fall '08. |
| | |
| | * Mainville, T., [*Thoughts on Creating Better MMORPGs: Application of Self-Concepts*|^Mainville_Paper2_Self-Concepts.pdf], Student Report-11, from Dr. Shankar's course, COT 6930 - Biologically Inspired Architecture, offered in Fall '08. |
| | |
| | * Mainville, T., [*Thoughts on Creating Better MMORPGs: Tools and Methodologies*|^Mainville_Paper3_ToolsAndMethodologies.pdf], Student Report-12, from Dr. Shankar's course, COT 6930 - Biologically Inspired Architecture, offered in Fall '08. |
| | |
| | * Mainville, T., [*Thoughts on Creating Better MMORPGs: The Potential Path to a Better MMORPG*|^Mainville_FinalTermPaper.pdf], Student Report-13, from Dr. Shankar's course, COT 6930 - Biologically Inspired Architecture, offered in Fall '08. |
| | |
| | * Mazoleny, C., *[*GAIA for Multi-Agent Systems: The Health Advisor Project*|^Health_Advisor_Project.pdf]*, Student Report-6, from Dr. Shankar's course, COT 6930 - Biologically Inspired Architecture, offered in Fall '08. |
| | |
| | * Mendolla, M., and Pillai, V., *[*Top-Down Design with UML: Pressure Perfect Monitoring System*|^Pressure_Perfect_Monitoring_System.pdf]*, Student Report-3, from CEN 4214 - Software-Hardware Codesign, offered in Fall '08. |
| | |
| | * Norona, C., and Templeton, R., *[*Top-Down Design with UML: University Class Scheduling*|^University_Class_Scheduling.pdf]**,* Student Report-4, from CEN 4214 - Software-Hardware Codesign, offered in Fall '08. |
| | |
| | * Potosme, J., [*Top-Down Design with UML: Geotag*|^Potosme_Term3_043009.pdf], SR 3-2009, from CEN 4214 - Software-Hardware Codesign, offered in Spring '09. |
| | |
| | * Rose, O., and Levak, A., [*Top-Down Design with UML: Automated Payroll System*|^Rose_Levak_Payroll_Automation_System_Term_Project3_04302009.pdf], SR 4-2009, from CEN 4214 - Software-Hardware Codesign, offered in Spring '09. |
| | |
| | * Vargas, R., and Bonezzi, C., [*Top-Down Design with UML: Excellent Scheduling System*|^vargas_bonezzi_term_project3_042909.pdf], SR 5-2009, from CEN 4214 - Software-Hardware Codesign, offered in Spring '09. |
| | |
| | {anchor:tutorials} |
| | *Tutorials* |
| | * Fonoage, M., [*TUTORIAL - SystemC with Visual Studio .NET*|^TUTORIAL - SystemC with Microsoft Visual Studio.pdf], edited by Aleksander Colic and Charles Norona, tutorial TU-3, for Professor Shankar's course, CDA4204 - CAD-Based Computer Design, 2009. |
| | |
| | * Norona, C., [*TUTORIAL - .NET - Creating User Interfaces*|^TUTORIAL - .NET - Creating User Interfaces.pdf], tutorial TU-1, for Professor Shankar's course, CEN4214 - Software/Hardware Codesign, 2009. [*Headfirst C# Examples*|^Book_Examples.zip] |
| | |
| | * Norona, C., [*TUTORIAL - EASy68k*|^Norona_TUTORIAL_01_EASy68k_011209.pdf], tutorial TU-2, for Professor Shankar's course, CEN4214 - Software/Hardware Codesign, 2009. |
| | |
| | * Norona, C., [*TUTORIAL - Visio 2007 - Where to get it*|^Norona_TUTORIAL_00_Visio - Getting Visio_011209.pdf ], tutorial TU-5, for Professor Shankar's course, CEN4214 - Software/Hardware Codesign, 2009. |
| | |
| | * Norona, C., [*TUTORIAL - Visio 2007 - UML Activity Diagrams*|^Norona_TUTORIAL_01_Visio-Creating Activity Diagrams_011209.pdf], tutorial TU-6, for Professor Shankar's course, CEN4214 - Software/Hardware Codesign, 2009. |
| | |
| | * Norona, C., [*TUTORIAL - Visio 2007 - UML Class Diagrams*|^Norona_TUTORIAL_02_Visio-Creating Class Diagrams_012809B.pdf], tutorial TU-7, for Professor Shankar's course, CEN4214 - Software/Hardware Codesign, 2009. |
| | |
| | * Norona, C., [*TUTORIAL - Visio 2007 - UML Use Case Diagrams*|^Norona_TUTORIAL_03_Visio-Creating Use Case Diagrams_012809.pdf], tutorial TU-8, for Professor Shankar's course, CEN4214 - Software/Hardware Codesign, 2009. |
| | |
| | * Norona, C., [*TUTORIAL - Visio 2007 - UML Sequence Diagrams*|^Norona_TUTORIAL_04_Visio-Creating Sequence Diagrams_012909.pdf], tutorial TU-9, for Professor Shankar's course, CEN4214 - Software/Hardware Codesign, 2009. |
| | |
| | * ProgrammingHelp.com, [*TUTORIAL - SystemC with Visual Studio .NET*|^TUTORIAL - dotNet - Using LINQ to SQL to Add.pdf], edited by Charles Norona, tutorial TU-4, for Professor Shankar's course, CEN4214 - Software/Hardware Codesign, 2009. |
| | |
| | {anchor:papers08} |
| | *Papers 2008* |
| | * Cardei, I., Fonoage, M., Shankar, R., [*Model Based Requirements Specification and Validation for Component Architectures*|^Model_Based_Requirements_Architectures.pdf], 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008 |
| | |
| | * Agarwal, A., Iskander, C., Hamza-Lup, G., Shankar, R., [*System-Level Modeling Environment : MLDesigner*|^System_Level_Modeling_Environment_MLDesigner.pdf], 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008 |
| | |
| | * Agarwal, A., Iskander, C., Kalva, H., Shankar, R., [*System-Level Modeling of a NOC Based H.264 Decoder*|^System_Level_Modeling_NOC_Based_H264.pdf], 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008 |
| | |
| | * Agarwal, A., Iskander, C., Islam, S., Katan, A., Shankar, R., [*Concurrency Compliant Embedded System Modeling Methodology*|^Concurrency_Compliant_Methodology.pdf], 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008 |
| | |
| | * Agarwal, A., Iskander, C., Hamza-Lup, G., Shankar, R., [*Component Selection Strategies Based on System Requirements & Dependencies on Components Attributes*|^Component_Selection_Strategies_on_Attributes.pdf], 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008 |
| | |
| | |
| | {anchor:papers07} |
| | *Papers 2007* |
| | * Agarwal, A., Jain, A., Kalva, H., Shankar, R., [*Annotation Methods and Application Abstractions*|^Annotation_Methods_Application_Abstractions.pdf], IEEE International Conference on Portable Information Device, Orlando, Florida, April 2007, pp.1-5 |
| | |
| | * Cardei, I., Fonoage, M., Shankar, R., *[*Framework for Requirements-Driven System Design Automation*|^Framework_Requirements_Driven_Automation.pdf]*, the 1st IEEE Systems Conference, Honolulu, Hawaii, April 2007 [Presentation|^Framework_Requirements_Driven_Automation_Presentation.pdf] |
| | |
| | * Agarwal, A., Shankar, R., *A Concurrency Model for Network on Chip Design Methodology* International Journal of Modeling and Simulation (Acepted - to be published). |
| | |
| | * Agarwal, A., Mustafa, M., Shankar, R., Pandya, A.S., Lho, Y., *A Deadlock Free Router Design for Network on Chip Architecture*, Journal of the Korea Institute of Maritine Information adn Communication Sciences, Vol. 11, No. 4, pp. 696-706, April 2007 |
| | |
| | * Agarwal, A., Shankar, S., Iskander, C., *NoC Model in System Level Modeling Environment: MLDesigner*, Journal of Engineering, Computing and Architectures" (Acepted - to be published). |
| | |
| | * Agarwal, A., Iskander, C., Shankar, R., *Survey of NoC Architectures and Contributions*, Journal of Engineering, Computing and Architectures" (Acepted - to be published). |
| | |
| | * Shankar, R., Kalva, H., Agarwal, A., Jain, A., *Annotation Methods for Embedded Systems*, IEEE International Conference on Portable Information Device, Orlando, FL April 2007. |
| | |
| | * Agarwal, A., Hamza-Lup, G., Shankar, R., Ansley, J., *[*An Integrated Methodology for QoS Driven Reusable Component Design and Component Selection*|^Integrated_Methodology_QOS_Driven_Component.pdf]*, 1st Annual IEEE Systems Conference, Hawaii, April 2007, pp. 1-7 [Presentation|^Integrated_Methodology_QOS_Driven_Component_Presentation.pdf] |
| | |
| | * Shankar, R., Borras, J., [*Radical Productivity Improvement with One Pass to Production (OPP)*|^Radical_Productivity_Improvement.pdf], 1st Annual IEEE Systems Conference, Hawaii, April 2007 [Presentation|^Radical_Productivity_Improvement_Presentation.pdf] |
| | |
| | * Fraser, J., Mattu, B., *[*Test Driven Design Challenges For Faster Product Development*|^Test_Driven_Design_Challanges.pdf]*, 1st Annual IEEE Systems Conference, Hawaii, April 2007 [Presentation|^Test_Driven_Design_Challenges_Presentation.pdf] |
| | |
| | * Mattu, B., Shankar, R., [*Test Driven Design Methodology For Component-Based System*|^Test_Driven_Design_Methodology.pdf], 1st Annual IEEE Systems Conference, Hawaii, April 2007 [Presentation|^Test_Driven_Design_Methodology_Presentation.pdf] |
| | |
| | * Choi, J., Islam, S., Shankar, R., *[*Unified Test Environment-Integrated Platform For Bridging The Modeling, Testing, and Code Development Flow*|^Unified_Test_Environment_Integrated.pdf]*, 1st Annual IEEE Systems Conference, Hawaii, April 2007 [Presentation|^Unified_Test_Environment_Integrated_Presentation.pdf] |
| | |
| | * Huang, S., Shankar, R., Mangs, J., *Towards Strategic Design Reuse by Leveraging Commodity and managing Variability*, 1st Annual IEEE Systems Conference, Hawaii, April 2007. |
| | |
| | * Cardei, I., Fonoage, M., Shankar, R., *[*Framework for Requirements-Driven System Design Automation*|^Framework_Requirements_Driven_Automation.pdf]*, 1st Annual IEEE Systems Conference, Hawaii, April 2007 [Presentation|^Framework_Requirements_Driven_Automation_Presentation.pdf] |
| | |
| | * Islam, S., *[*A Modeling Methodology For an RTOS*|^Modeling_Methodology_RTOS_Thesis.pdf]*, M.S. Thesis, Computer Science, 2007 |
| | |
| | |
| | {anchor:papers06} |
| | *Papers 2006* |
| | * Agarwal, A., *[*QoS Driven Communication Backbone for NOC Based Embedded Systems*|^QoS_Driven_Communication_Backbone_Dissertation.pdf]*, Ph.D. Dissertation, Computer Science, 2006. |
| | |
| | * Agarwal, A., Shankar, R., [*Modeling Concurrency in NOC for Embedded Systems*|^Modeling_Concurrency_Embedded_Systems.pdf], IEEE Conference of High Performance Computing, Massachusetts Institute of Technology, MIT Lincoln Labs, Boston , Massachusetts, Septempber 2006. |
| | |
| | * Agarwal, A., and Shankar, R., [*Concurrency Model for Network on Chip Design Architecture*|^Concurrency_Model_for_NOC.pdf], Intl. J of Modeling and Simulation, Accepted for Publication, May 2006 |
| | |
| | * Agarwal, A., Shankar, R., Pandya, A.S., *Embedding Intelligence into EDA Tools to Meet the Future Technology Trends*, Integrated Intelligent Systems for Engineering Design, Edited by Dr. Xuan F Zha, National Institute of Standards and Technology, USA & Dr. R. J. Howlett, University of Bringhton, UK |
| | |
| | * Agarwal, A., Shankar, R., *A Concurrency Model for NOC Design Methodology*, IEEE Conference of High Performance Computing, Massachusetts Institute of Technology, September 2006 |
| | |
| | * Agarwal, A., Pandya, A. S., Lho, Y., *NOC Architecture Design Methodology*, Journal of Korea Institute of matitime Information and Communication Sciences, Vol.1, pp. 57-64, August 2006 |
| | |
| | * Agarwal, A., Pandya, A.S., Lho, Y., *Low Power High Frequency Data Transfer for a RISC and CISC Processor Using AdHoc Techniques*, The International Journal of Korean Institute of Maritime Information and Communication Sciences, Vol. 10, No.2, pp. 321-327, August 2006. |
| | |
| | * Agarwal, A., Pandya, A.,*Software Complexity Management for Real-Time Systems*, International Journal of KIMICS, Vol 4, No. 1, pp.23-27, March 2006 |
| | |
| | * Jain, A., Shankar, R., *[*Software Decomposition for Multi-Core Architectures*|dc:Publications and Patents^Software_Decomposition_for_Multicore_Architectures.pdf]*, IEEE Conference of High Performance Computing, Massachusetts Institute of Technology, September 2006 |
| | |
| | * Agarwal, A., Shankar, R., Kovalski, F., *Modeling Concurrency on NOC Architecture with Symbolic Language: FSP*, IEEE International Conference on Symbolic Methods and Applications to Circuit Design, October 2006 |
| | |
| | * Agarwal, A., Mustafa, M., Pandya, A., *[*QOS Driven Network-On-Chip Design for Real Time Systems*|^QOS_Driven_Network.pdf]*, IEEE Conference in Electrical and Computer Engineering, Canada, May 2006 |
| | |
| | * Agarwal, A., Mustafa, M., Shankar, R., *Quality of Service Driven Communication Backbone Design for Network on Chip Architecture Design Methodology*, IEEE Conference in Electrical and Computer Engineering, Canada, May 2006 |
| | |
| | * Selvan, V., Shankar, R., *[*Comparison of Specification Languages and Tools*|^Comparison_Specification_Languages_Tools.pdf]*, Third Prize Winner, UTC Telecom, Tampa, May 2006 [Presentation|^Comparison_Specification_Languages_Tools_Presentation.pdf] |
| | |
| | * Agarwal, A., Mustafa, M., Shankar, R., Pandya, A. S., *Quality of Service Driven Communication Backbone Design for Network-on-Chip Architecture Design Methodology*, IEEE Conference on Electrical and Computer Engineering, Canada, May 2006 |
| | |
| | * Jain, A., *[*Software Decomposition For Multicore Architectures*|^Software_Decomposition_Multicore_Architectures_Thesis.pdf]*, M.S. Thesis, Computer Science, 2006. [Presentation|^Software_Decomposition_Thesis_Defense_Presentation.pdf] |
| | |
| | * Kovalski, F., *[*System Level Modeling and Simulation With MLDesigner*|^System_Level_Modeling_Simulation_MLDesigner_Thesis.pdf]*, M.S. Thesis, Computer Science, 2006 |
| | |
| | |
| | {anchor:papers05} |
| | *Papers 2005* |
| | * Agarwal, A., Shankar, R., *A Layered Architecture for NOC Design Methodology,* International Conference on parallel and Distributed Computing and Systems", November 2005 |
| | |
| | * Shankar, R., and Barrett, Jr., R.L., *[*On Building a Long-Term University-Industry Collaboration*|^On_Building_a_Long_Collaboration.pdf]*, accepted, IEMC (IEEE Engineering Management Conference) 2005, Newfoundland, Canada , August 2005. [Presentation|^On_Building_a_Long_Collaboration_Presentation.pdf] |
| | |
| | * Shurpali, P., and Shankar, R., *[*SystemC for a Paradigm Shift: Concurrency Modeling*|^Concurrency_Modeling.pdf]*, MSE (Microelectronics Systems Education) Conference, San Jose , CA , June 2005. |
| | |
| | * Agarwal, A., Pandya. A., Lho, Y., *Low Power Design of an ALU Using AdHoc Techniques*, International Journal of Fuzzy Logic and Intelligent Systems, Vol. 5, No. 2, Jun 2005 |
| | |
| | * Agarwal, A., Pandya. A., Lho, Y.,*Biometrics for Person Authentication: A Survey*, Journal of Korea Intelligent Information System Society, Vol. 11, No. 1, pp. 1-15, June 2005 |
| | |
| | * Shankar, R., *[*High Speed Scaleable Multiplier*|dc:Publications and Patents^Patent_High_Speed_Scalable_Multiplier.pdf]*, US Patent No 7080114, Granted April 2006, Publication No. 20030105792, January 2005 |
| | |
| | * Shankar, R., *[*Method of concurrent visualization of module outputs of a flow process*|dc:Publications and Patents^Patent_Method_of_Concurrent_Visualization.pdf]*, US Patent Application No. 20050010598. Published January 2005 |
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| | {anchor:papers04} |
| | *Papers 2004* |
| | * Asaduzzaman, A., Mahgoub, I. , Kalva, H., Sanginepalli, Shankar, R., and Furht, B.,*[*Cache Optimization for Mobile Devices Running Multimedia Applications*|^Cache_Optimization_Mobile_Devices.pdf]**,* IEEE, 6 th ISMSE, Miami , FL December 2004, pp. 499-506. |
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| | * Jayadevappa, S., and Shankar, R., *[*CAD Based Design Course Using a State of the Art System Level Language*|^CAD_Based_Design_Course.pdf]*, American Society for Engineering Education (ASEE), Salt Lake City , Utah , June 2004 |
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| | * Freytag, G., Shankar, R., *[*Digital Hardware Verification Methods*|dc:Publications and Patents^Digital_Hardware_Verification_Methods.pdf]*, European Workshop on Microelectronics Education (EWME), poster paper, April 2004. [Summary|dc:Publications and Patents^Digital_Hardware_Verification_Methods_Summary.pdf] |
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| | * Shankar, R., and Jayadevappa, S., *[*A New SystemC-based Foundation for the CE Curriculum*|dc:Publications and Patents^A_New_SystemC_Based_Foundation_Curriculum.pdf]*, European Workshop on Microelectronics Education (EWME), Oral Presentation, Lausanne, Switzerland, April 2004, pp. 33-37. [Presentation|dc:Publications and Patents^A_New_SystemC_Based_Foundation_Curriculum_Presentation.pdf] |
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| | * Jayadevappa, S., Mahgoub, I. , and Shankar, R., *[*Experiences of Modeling Soft IPs at High Level of Abstraction Using SystemC: A Case Study*|^Experiences_Modeling_Soft_IP_SystemC.pdf]*, Design and Verification Conference (DVCon), San Jose, March 2004 |
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| | * Jayadevappa, S., Shankar, R., and Mahgoub, I. , *[*A Comparative Study of Modeling at Different Levels of Abstraction in System on Chip Designs: A Case Study*|^Comparative_Study_Modeling_Different_Levels.pdf]*, IEEE Symposium on VLSI (ISVLSI), Lafayette , LA , February 2004 |
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| | * Agarwal, A., Pandya. A., Lho, Y., *Low Power Design of a Neuroprocessor*, International Journal of Fuzzy Logic and Intelligent Systems, Vol. 4, No. 1, pp. 79-81, Jun 2004 |
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| | * Shankar, R., *[*A Dynamically Reconfigurable Power-Aware, Highly Scalable Multiplier with Reusable and Logically Optimized Structures*|dc:Publications and Patents^Patent_Dynamically_Reconfigurable_Power_Aware.pdf]*, US Regular Patent filed, December 2004, Published June 2005, Publication No 20050120069 |
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| | * Jillellamudi, H., Wissinger, F., Goswami, J., Shankar, R., *[*Transaction Level Modeling of a Peripheral Using SystemC*|^Transaction_Level_Modeling.pdf]*, Unpublished, 2004 |
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| | * Jillellamudi, H., Shankar, R., *[*Modeling multiple levels of abstraction using SystemC*|^Modeling_Multiple_Levels_SystemC.pdf]*, Unpublished, 2004 |
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| | * Selvan, V., Shankar, R., *[*UML Combined With SDL At Specification*|^UML_Combined_With_SDL.pdf]*, Unpublished, 2004 |
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| | * Agarwal, A., Tippanagoudar, V., Shankar, R., *[*UML Notification for Power Management with WindowsCE.NET*|^UML_Notification_Power_Management.pdf]* *,* Unpublished, 2004 |
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| | {anchor:oldPubs} |
| | *Older Publications* |
| | * Jayadevappa, S., *[*Shine: An Integrated Environment For Software Hardware Co-Design*|^Shine_Integrated_Environment_Dissertation.pdf]*, Ph.D Dissertation, Computer Science, 2003 |
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| | * Karnati, R., *[*Design For Signal Integrity*|^Design_For_Signal_Integrity_Thesis.pdf]*, M.S. Thesis, Computer Science, 2003 |
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| | * Jillellamudi, H., *[*Modeling Multiple Abstraction Levels in SoC Using SystemC*|^Modeling_Multiple_Abstraction_Thesis.pdf]*, M.S. Thesis, Computer Science, 2003 |
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| | * Quraishi, G., Shankar R., *[*On Simulating the IP Market Dynamics in an Academic Environment using SystemC*|dc:Publications and Patents^On_Simulating_the_IP_Market_Dynamics.pdf]*, 2003 IEEE International Conference On Microelectronic Systems Education, MSE 2003, Anaheim, CA, USA, June 1-2, 2003 |
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| | * Ajmera, A.M., Shankar R., Masory, O., *AMS Designer for Mechatronics*, 2002 IEEE International Workshop on Behavioral Modeling and Simulation, BMAS 2002, Santa Rosa, CA, Oct. 6-8, 2002 |
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| | * Ajmera, A. M., Shankar, R., Masory, O., *[*AMS Designer for Mechatronics*|dc:Publications and Patents^AMS_Designer_for_Mechatronics.pdf]*, International Cadence Usergroup Conference 2002, Cadence Design Systems, San Jose, CA, Sep 15-19, 2002 |
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| | * Rajeevalochanam J., Shankar R., Jayadevappa S., *[*High-level Performance Modeling Using VCC*|^High_Level_Performance_VCC.pdf]*, International Cadence Usergroup Conference 2002, Cadence Design Systems, San Jose, CA, Sep 15-19, 2002 |
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| | * Shankar R., *[*A Concurrent Language for Capturing Chip Design Flow: Verilog*|^Concurrent_Language_Capturing_Chip.pdf]*, International Cadence Usergroup Conference 2001, Cadence Design Systems, San Jose, CA, Sep 16-19, 2001 |
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| | * Shankar, R., *[*Apparatus for Detecting the onset and relative degree of atherosclerosis in humans*|dc:Publications and Patents^Patent_Method_and_Apparatus_Detecting_Onset.pdf]*, 19 claims, USA Patent No. 5,343,867, Granted September 6, 1994 |
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| | * Shankar, R., *[*Method for Detecting Atherosclerosis while excluding motion artifacts*|dc:Publications and Patents^Patent_Method_for_Detecting_Atherosclerosis.pdf]*, 18 claims, USA Patent No. 5,297,556, Granted March 29, 1994 |
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| | * Shankar, R., *[*Early and Noninvasive Detection of Atherosclerosis*|dc:Publications and Patents^Patent_Early_and_Noninvasive_Detection_Atherosclerosis.pdf]*, 25 claims,USA Patent No. 5,241,963, Granted Sept. 7, 1993 |
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| | * Kolluri, S., and Shankar, R., *[*Noninvasive Determination of Atherosclerosis Using the Impedance Plethysmograph: A Longitudinal Study*|dc:Publications and Patents^Noninvasive_Determination_Atherosclerosis_Plethysmograph.pdf]*,_World Congress on Medical Physics and Biomedical Engineering_,Osaka, Japan, July 1991 |
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| | * Shankar, R., and Webster, J.G., *[*Noninvasive Measurement of Compliance of Human Leg Arteries*|dc:Publications and Patents^Noninvasive_Measurement_Leg_Arteries.pdf]*, _IEEE Trans. Biomed Eng._, Vol. 38, No. 1, pp. 62-67, January 1991 |
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| | * Shankar, R., and Bond, M.G., *[*Correlation of Noninvasive Arterial Compliance with Anatomic Pathology of Atherosclerotic Nonhuman Primates*|dc:Publications and Patents^Correlation_of_Noninvasive_Arterial_Compliance.pdf]*, _Atherosclerosis_, Vol. 85, pp. 37-46, December 1990 |
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| | * Pajunen, G., Steinmetz, M., and Shankar, R., *[*Model Reference Adaptive Control with Constraints for Postoperative Blood Pressure Management*|dc:Publications and Patents^Model_Reference_Adaptive_Control_Postoperative.pdf]*, _IEEE Trans._ _Biomed. Eng._, Vol. 37, No. 7, pp. 679-687, July 1990. |
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| | * Shankar, T.M.R., Webster, J.G. and Shao, S.Y., *[*The Contribution of Vessel Volume Change and Blood Resistivity Change to the Electrical Impedance Pulse*|dc:Publications and Patents^The_Contributions_of_Vessel_Volume.pdf]*, _IEEE Trans. Biomed. Eng_, Vol. BME-32, No. 3, pp. 192-198, March 1985 |
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| | * Shankar, T.M.R., and Webster, J.G., *[*Contribution of Different Sized Vessels in the Extremities to the Arterial Pulse Waveform as Recorded by Electrical Impedance and Volume Plethysmography*|dc:Publications and Patents^Contribution_Different_Sized_Vessels.pdf]*, _Med. Biol. Eng. Comput._, Vol. 23, pp. 155-164, March 1985 |
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| | * Shankar, T.M.R., and Webster, J.G., *[*Design of an Automatically Balancing Electrical Impedance Plethysmograph*|dc:Publications and Patents^Design_Automatically_Balancing_Electrical_Plethysmograph.pdf]*, _Journal of Clin. Eng_, Vol. 9, pp. 129-134, April-June 1984 |
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